CH543

Overview

CH543 is a USB and USB PD enhanced E8051 core MCU compatible with MCS51 instruction set. 79% of its instructions are single-byte single-cycle instructions. CH543 features high run speed. CH543 has built-in 16K Flash-ROM, 256-byte internal iRAM, and 256-byte on-chip xRAM. The xRAM supports direct memory access (DMA). CH543 provides a built-in USB Power Delivery controller and PD BMC PHY transceiver. CH543 supports USB type C, BC, PD2.0, and PD3.0, and supports 12V high-voltage power. It can act as PMIC used for power management, Sink, Source and DRP. CH543 provides a built-in USB host controller and transceiver, and supports full-speed and low-speed USB Host and USB Device. CH543 also provides a built-in 12-bit analog-to-digital converter (ADC), capacitive touchkey detection module, built-in clock, 3 timers, 2-channel signal capture, 4-channel PWM, UART, SPI, I2C slave, and other function modules.

System Block Diagram

Features

• Enhanced E8051 core CPU, with special XRAM data fast copy instruction. Double DPTR pointers.
• Built-in USB controller and USB transceiver support USB 2.0 full-speed and low-speed host/device. Support DRP.
• The P3.5 pin supports VDD12 high-voltage 12V input/output. The RST pin supports VDD12 high-voltage 12V as a general-purpose input.
• Built-in 12V to 3.3V or 4.7V low dropout regulator, used for USB, I/O, ADC and other modules. VDD12 supports 5V/3.3V/9V or even 12V/2.8V supply voltage.
• Packages: TSSOP20, SOP16, QFN20, ESSOP10.