CH558

Overview

CH558 is an enhanced E8051 core MCU, compatible with MCS51 instruction set. 79% of its instructions are single-byte single-cycle instructions. CH558 has built-in 32K CodeFlash and 4K+256B RAM. CH558 has a built-in USB full-speed transceiver, supports USB Device mode, and supports USB2.0 full-speed (12Mbps) and low-speed (1.5Mbps) transfer. CH558 supports up to 64 bytes of data packet, with built-in FIFO, and supports DMA. CH558 provides abundant interface sources, including built-in class RS485 data transceiver, LED control card interface and fast level capture function. CH558 also has 1 SPI, 2 UARTs, 8-bit parallel port, etc. UART1 is compatible with 16C550. CH558 has 4 timers, provides 1-channel 16-bit PWM, and supports 8-channel 10/11-bit ADC.

System Block Diagram

Features

• Enhanced E8051 core CPU, the speed is 8-15 times faster than that of standard MCS51, with special XRAM data fast copy instruction.
• Built-in 32KB Code Flash, 5KB Data Flash and 3KB BootLoader. ISP through USB or UART.
• Built-in 4KB XRAM and internal 256B RAM.
• Built-in DMA controller supports USB and Timer3, ADC and LED control.
• Built-in USB controller supports USB2.0 full-speed and low-speed device.
• 4 timers/counters. 3-channel signal capture and 1-channel PWM output.
• 2 full-duplex UARTs. UART1 has built-in 8-byte FIFO and supports class RS485 mode data reception/transmission.
• One SPI communication interface, with built-in FIFO, supports master/slave mode.
• 8-channel 10/11-bit ADC multiplexed with GPIO.
• Built-in clock and PLL. An external crystal oscillator is also supported.
• Packages: SSOP20, LQFP48.