CH482D
CH482D Ultra-High-Speed Analog Switch Chip
SKU: KL-426-0003869
Category: Analog Switches / Multiplexers
About this item
Attribute | Value |
---|---|
Manufacturer | WCH(Jiangsu Qin Heng) |
Package | QFN20-2.5*4.5 |
VDD | 3.3V |
Typical Internal Resistance | 4Ω |
Typical Bandwidth | 7GHz |
Signal Voltage | 0~1.5V |
Application Signal Recommendations | DP; USB3.0(5Gbps); |
Certification | RoHS |
CH482 is a QPDT broadband, high-speed bidirectional analog switch chip, including two differential channels of 2:1 MUX (four channels selectable for one). CH482D can be used for dual-channel differential signal selection, including USB 3.0 Super Speed, PCIe Gen1/2, SATA/SAS 1.5G/3G/6G, DisplayPort, and more.
CH482X shares similar functionalities with CH482D, but with higher bandwidth. It is suitable for dual-channel differential signal selection, including USB 3.1 Gen2 (USB 3.0 Super Speed+), PCIe Gen1/2/3, SATA/SAS 3G/6G, DisplayPort, and other applications.
Features:
- High bandwidth, with SuperSpeed channels supporting 6Gbps differential signals and compatibility with ultra-speed USB signals.
- CH482X SuperSpeed channels supporting 10Gbps differential signals and compatibility with USB 3.2 Gen2 signals.
- High-Speed (HS) channels supporting 1.5G (4:1) or 2.5Gbps (2:1) differential signals, accommodating full-scale voltage analog signals.
- HS channels supporting video signals and compatibility with low-speed, full-speed, and high-speed USB signals.
- Low ON resistance, with a typical Ron value of approximately 4Ω.
- Low crosstalk, high isolation.
- Global enable pin provided for unified enablement and switching of multi-channel analog switches.
- SuperSpeed channels ESD protection supporting 2KV HBM, while other channels and control pins have ESD protection supporting 4KV HBM.
- Supports rated 3.3V power supply voltage with low static power consumption.
- Available in various package forms such as QFN20-2.54.5, QFN42-3.59, and QFN28, and is compatible with RoHS.
package:
Note:
- The QFN package has the bottom pad marked as pin 0; it is not mandatory but recommended to connect.
- CH483X is reserved for compatibility applications; for new designs, it is recommended to prioritize CH483M or CH482D.
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